The present invention relates, in general, to semiconductor components and, more particularly, to semiconductor components that include one or more integrated passive circuit elements.
Semiconductor component manufacturers are constantly striving to increase the functionality and performance of their products, while decreasing their cost of manufacture. One approach for increasing functionality and performance has been to increase the number of circuit elements manufactured from a semiconductor wafer. As those skilled in the art are aware, a semiconductor wafer is divided into a plurality of areas or regions called chips or dice. Identical circuit elements are manufactured in each chip. Increasing the number of chips in a semiconductor wafer lowers the cost of manufacturing semiconductor components. However, a drawback with integrating a larger number of circuit elements in a semiconductor wafer is that it increases the area occupied by each chip and thereby decreases the number of chips that can be manufactured from a single semiconductor wafer. Integrating passive circuit elements in a semiconductor material further increases the chip size because they occupy large areas compared to, for example, active devices. Thus, in lowering manufacturing costs semiconductor component manufacturers trade off the number of circuit elements that can be manufactured in a chip with the number of chips that can be obtained from a semiconductor wafer.
Another drawback with monolithically integrating passive circuit elements in a semiconductor chip is that the tools for manufacturing passive circuit elements are optimized for manufacturing larger geometry devices whereas the tools for manufacturing active circuit elements are optimized for manufacturing smaller geometry devices. For example, equipment used in the manufacture of passive circuit elements is precise to within a tenth of a micron whereas equipment used for manufacturing active circuit elements is precise to within a thousandth of a micron.
Accordingly, it would be advantageous to have a method for manufacturing passive circuit elements in a semiconductor chip that is area and cost efficient. It would be of further advantage to be able to use common equipment or toolsets for manufacturing passive circuit elements as are used to manufacture active circuit elements.
For simplicity and clarity of the illustrations, elements in the figures are not necessarily drawn to scale, and the same reference characters in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current flow through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with embodiments of the present invention. It will be appreciated by those skilled in the art that the words during, while, and when as used herein are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay, such as a propagation delay, between the reaction that is initiated by the initial action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be very close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to about ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are regarded as reasonable variances from the ideal goal of exactly as described. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions generally may not be straight lines and the corners may not be precise angles. In addition, the terms “on,” “overlying,” and “over” may be used to indicate that two or more elements are in direct physical contact with each other. However, “over” may also mean that two or more elements are not in direct contact with each other. For example, “over” may mean that one element is above another element but the elements do not contact each other and may have another element or elements in between the two elements.